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 STLVDS104
4-port lvds and 4-port TTL-to LVDS repeaters
Feature summary
I
Receiver and drivers meet or exceed the requirements of ansi eia/tia-644 standard, receivers differential input levels, 100mV Designed for signaling rates up to 630mbps Operates from a single 3.3V supply Low voltage differential signaling with typical output voltage of 350mV and a 100 load Propagation delay time: 3.1ns (typ) Electrically compatible with LVDS, PECL, LVPECL, LVTTL, LVCOMOS, GTL, BTL, CTT, SSTL, or HSTL outputs with external network Bus terminal ESD (HBM) exceeds 7kV TSSOP package noise coupling, and switching speed to transmit data at a speed up to 630Mbps at relatively long distances. The drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allow extremely precise timing alignment of the signals repeated from the input. The device allows extremely precise timing alignment of the signal repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream. .
I I I I I
TSSOP
I I
Description
The STLVDS104 is a differential line receiver and a LVTTL input connected to four differential line drivers that implement the electrical characteristics of low voltage differential signaling, for point to point baseband data transmission over controlled impedance media of approximately 100. The transmission media can be printed-circuit board traces, backplanes, or cable. LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low
Order codes
Type STLVDS104BTR March 2006 Temperature Range -40 to 85 C Package TSSOP16 (Tape & Reel) Rev. 5 Comments 2500 parts per reel 1/12
www.st.com 12
STLVDS104
Contents
1 2 3 4 5 6 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STLVDS104
Pin configuration
1
Figure 1.
Pin configuration
Pin connections and functional diagram
Table 1.
Pin description
Pin n 1, 2, 3, 8 6, 7 9, 11, 13, 15 Symbol EN1 to EN4 A, B 1Z to 4Z 1X to 4X GND VCC Name and function Enable Driver Inputs Receiver Input Driver Inputs Driver Inputs Ground Supply Voltage
10, 12, 14, 16 5 4
Table 2.
Truth table for receiver
Input VID = VA - V B X X VID 100mV Enables #EN X L H H H #Y Z Z H ? L Outputs #Z Z Z L ? H
-100mV < VID < 100mV VID -100mV
L=Low level, H=High level, X=Don't care, Z= High impedance,?=Indeterminate
3/12
Maximum ratings
STLVDS104
2
Table 3.
Symbol VCC VR
Maximum ratings
Absolute maximum ratings
Parameter Supply voltage (Note 1) Enable inputs Voltage range A, B, Y or Z Y, Z, to GND ESD Tstg ESD Protection voltage (HBM) All Pins Storage temperature range 2 -65 to +150 KV C -0.5 to 4 7 V KV Value -0.5 to 4 -0.5 to 6 Unit V V
Note: Note: 1
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. All voltages except differential I/O bus voltage, are with respect to the network ground terminal. Recommended operating conditions
Parameter Supply voltage HIGH level input voltage LOW level input voltage Magnitude of differential input voltage Common mode input voltage Operating temperature range 0.1 |VID|/2 Min. 3.0 2.0 0.8 3.6 24-|VID|/2 VCC-0.8 -40 85 C Typ. 3.3 Max. 3.6 Unit V V V V V
Table 4.
Symbol VCC VIH VIL |VID| VIC TA
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STLVDS104
Electrical characteristics
3
Table 5.
Electrical characteristics
Electrical characteristics (TA = -40 to 85C, and V CC = 3.3V 10% over recommended operating conditions unless otherwise noted. All typical values are at TA = 25C).
Parameter Positive-going differential input voltage threshold Negative-going differential input voltage threshold Differential output voltage magnitude Change in differential output voltage magnitude between logic state RL = 100, VID = 100mV -100 247 340 454 Test Min. Typ. Max. 100 Unit mV mV mV
Symbol VITH+ VITH|VOD| |VOD|
-50
50
mV
Change in steady-state common VOC(SS) mode output voltage between logic state VOC(SS) VOC(PP) ICC Steady-state Common Mode Output Voltage Peak to peak common mode output voltage Supply current Enabled, RL = 100 Disabled Input current (A or B Inputs) Power OFF input current High level input current Low level input current Short circuit output current High Impedance output current Power OFF output current Input capacitance (A or B inputs) Output capacitance (Y or Z outputs) VI =0V VI = 2.4V VCC = 1.5V, VI = 2.4V VIH = 2V VIL = 0.8V VO(Y) or VO(Z) = 0V VOD = 0 VO = 0 or 2.4V VCC = 1.5V, VO = 2.4V VI = 0.4 sin (4e6t)+0.5V
-50
50
mV
1.125
1.2 25 20 2.5
1.375 150 30 5 -20
V mV mA mA A A
-2 -1
-11 -3 3 7 3 6 3
II II(OFF) IIH IIL IOC IOZ IO(OFF) CIN CO
20 20 10 10 10 1 1
A A A mA mA A A pF pF
3 6
VI = 0.4 sin (4e6t)+0.5V, Disabled
5/12
Electrical characteristics Table 6.
STLVDS104
Switching characteristics (TA = -40 to 85C, and VCC = 3.3V unless otherwise noted. All typical values are at TA = 25C).
Parameter Propagation delay time, low to high output Propagation delay time, high to low output Differential output signal rise time Differential output signal fall time Pulse skew (|tTHL - tTLH|) Channel-to-channel output skew Part to part skew
(2) (1)
Symbol tPLH tPHL tr tf tsk(P) tsk(O) tsk(pp) tPZH tPZL tPHZ tPLZ
Test
Min. 2.4 2.2
Typ. 3.2 3.1 0.7 0.7 100 50
Max. 4.2 4.2 1.2 1.2 300 100 1.5
Unit ns ns ns ns ps ps ns ns ns ns ns
RL = 100 CL = 10pF
0.3 0.3
Propagation delay time, high impedance to high level output Propagation delay time, high impedance to low level output Propagation delay time, high level to high impedance output Propagation delay time, low level to high impedance output
7.2 8.4 3.6 6
15 15 15 15
1. tsk(O) is the time difference between the tPLH or tPHL of all drivers of a single device with all their inputs connected together 2. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuit
6/12
STLVDS104
Typical performance characteristics
4
Typical performance characteristics
(Unless otherwise specified TJ = 25C)
Figure 2.
Output current vs output high voltage
Figure 3.
Output current vs output low voltages
Figure 4.
High to low propagation delay time
Figure 5.
Low to high propagation delay time r
7/12
Package mechanical data
STLVDS104
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
8/12
STLVDS104
Package mechanical data
TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
9/12
Package mechanical data
STLVDS104
Tape & Reel TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
10/12
STLVDS104
Revision history
6
Table 7.
Date
Revision history
Revision history
Revision 5 Changes Order codes has been updated and new template.
14-Mar-2006
11/12
STLVDS104
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